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4 cards from this section. Quick, good the night before a test.
What does HDL stand for?
Consider the context of FPGA programming.
Name one language used for programming FPGAs.
Think of the acronym VHDL.
What does VHDL stand for?
Think about what VHSIC implies.
True or False: Verilog syntax resembles that of C programming.
Recall how C syntax looks.
Design an FPGA setup using both VHDL and Verilog for a simple traffic light control system with timers. Outline all five stages of your design flow.
Think of each traffic light as a separate component in your HDL.
Consider a scenario where an engineer has coded an FPGA design but finds that the synthesized design does not match the expected behavior. What debugging steps should be taken?
What would you check first if you don't get the output you expected?
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