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5 cards from this section. Quick, good the night before a test.
What does VHDL stand for?
What is the full form of VHDL?
What is an entity in VHDL?
Think about what connects external elements to internal logic.
What is the primary purpose of VHDL?
Remember VHDL's focus areas.
True or False: VHDL language supports only one data type.
Think about what types we discussed.
Design a VHDL code for a 2-input XOR gate. Explain your design choices.
Recall how XOR functions in terms of AND and NOT.
Explain how you would modify the existing AND_GATE code to accommodate a 3-input AND gate.
Consider how additional inputs affect the logic.
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