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2 cards from this section. Quick, good the night before a test.
What does DMA stand for?
Look at the first part of the acronym.
What is the primary advantage of DMA over interrupt-driven I/O?
Think about how data is transferred in both methods.
What happens during burst transfer mode?
Consider how the data is handled in each mode.
Is it true that cycle stealing mode allows the CPU to perform other operations during data transfers?
Think about the CPU's ability to multitask during transfers.
You are designing a DMA system for a new I/O device. Consider four different configurations based on the teachings of DMA architecture. What would they be, and how do they impact CPU suspension?
Think about how the interconnections between devices and memory change bus access patterns.
Given that a DMA controller is set to transfer 1 MB of data in a cycle-stealing manner with a 16-bit architecture, calculate how many total transfers will occur. Discuss the efficiency compared to burst mode.
Calculate how data size affects the number of transfers needed and consider the implications on CPU workload.
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