Practice Cache Misses In Problem 2 (7.1.8) - Multi-level Caches - Computer Organisation and Architecture - Vol 3

Practice: Cache Misses in Problem 2

Lesson 7.1.8Multi-level Caches

Practise this section

8 questions

Flashcard drill
3 cards from this section. Quick, good the night before a test.
Exercise
5 questions · about 3 min · pass mark 70%. Hints available.
Sign up to start the exercise
Quiz
3 questions · about 2 min · pass mark 70%. Hints available.
Sign up to start the quiz

6 sample questions

Question 1.
What is the primary purpose of an L1 cache?
Show hintHide hint
Recall the structure of the cache hierarchy.
Question 2.
Define cache miss.
Show hintHide hint
Think about the situations when we need to access main memory.
3Question 3.
What is a cache miss?
- Data not found in cache
- Data found in cache
- Data being loaded
Show hintHide hint
Think about the conditions that lead to accessing main memory.
4Question 4.
True or False: Increasing the L2 cache size always reduces the miss rate.
- True
- False
Show hintHide hint
Consider the trade-offs involved in caching.
Question 5.
Given a CPU architecture with a base CPI of 2, a miss rate of 1.5% for L1 cache with a miss penalty of 300 cycles, calculate the new effective CPI after adding L2 cache with a reduced miss rate of 0.5% with a 50 cycle penalty.
Show hintHide hint
Apply the effective CPI calculation for both levels with penalties.
Question 6.
Discuss the implications of a very high miss rate on CPU performance and how cache design might be adjusted to mitigate this issue in a multi-level cache architecture.
Show hintHide hint
Refer to trade-offs discussed in cache design.

4 more questions in this section. Enroll free to practise them all.