Practice Instruction Decoder (29.2.5) - Three Bus Architecture - Computer Organisation and Architecture

Practise this section

9 questions

Flashcard drill
4 cards from this section. Quick, good the night before a test.
Exercise
6 questions · about 4 min · pass mark 70%. Hints available.
Sign up to start the exercise
Quiz
3 questions · about 2 min · pass mark 70%. Hints available.
Sign up to start the quiz

6 sample questions

Question 1.
What is the role of the ALU in a CPU?
Show hintHide hint
Think about the major functions within a CPU.
Question 2.
How many buses are in a three-bus architecture?
Show hintHide hint
Remember the letters associated with the buses.
3Question 3.
What is the primary function of the ALU?
- Memory Management
- Data Input
- Arithmetic and Logic Operations
Show hintHide hint
Consider what computations the CPU must perform.
4Question 4.
True or False: A three-bus architecture uses temporary registers to hold data during operations.
- True
- False
Show hintHide hint
Think about how data moves in this type of architecture.
Question 5.
Describe a scenario in which a single bus architecture might lead to processing delays. How does a three-bus architecture alleviate these delays?
Show hintHide hint
Think about the limitations of a single pathway for data.
Question 6.
Critically assess the trade-offs involved in using a three-bus architecture compared to single or dual bus systems in CPU design.
Show hintHide hint
Consider both technical and economic perspectives.

5 more questions in this section. Enroll free to practise them all.