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3 cards from this section. Quick, good the night before a test.
What does the Memory Data Register (MDR) do?
Think about data movement within the CPU.
Name one difference between single bus and three bus architectures.
Consider how data travels.
What does the MDR temporarily hold?
Consider the purpose of the MDR.
True or False: Three bus architectures do not require control signals.
Think about complexity variation.
If a system suffers from high latency due to excessive control signals in a three bus architecture, how might you redesign it to optimize performance?
Think about how control signals can be simplified.
Design an experiment to measure execution speed differences between a single bus and a three bus architecture using a specific instruction set.
How can you accurately record execution times?
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