Practice Fetching And Executing Instructions (12.4.1) - Fetch Cycle - Computer Organisation and Architecture - Vol 1

Practice: Fetching and Executing Instructions

Lesson 12.4.1Fetch Cycle

Practise this section

9 questions

Flashcard drill
3 cards from this section. Quick, good the night before a test.
Exercise
6 questions · about 4 min · pass mark 70%. Hints available.
Sign up to start the exercise
Quiz
3 questions · about 2 min · pass mark 70%. Hints available.
Sign up to start the quiz

6 sample questions

Question 1.
What does the Program Counter (PC) do?
Show hintHide hint
Think about where instructions come from.
Question 2.
What is the purpose of the Memory Buffer Register (MBR)?
Show hintHide hint
Consider what happens while moving data.
3Question 3.
What does the Program Counter (PC) do?
- Stores current data
- Holds address of next instruction
- Executes instructions
Show hintHide hint
Recall the role of the PC in the instruction process.
4Question 4.
True or False: The Memory Address Register (MAR) holds the actual instruction.
- True
- False
Show hintHide hint
Consider what MAR is designed to do.
Question 5.
A CPU has a fetching speed of 4 GHz and a memory speed of 2 GHz. If you fetch an instruction every clock cycle, how does the difference in speeds affect the execution of a program?
Show hintHide hint
Consider the implications of mismatched speeds.
Question 6.
Describe a scenario where an inefficient fetch-execute cycle could lead to performance bottlenecks in a system with a heavily loaded processor and memory.
Show hintHide hint
Think about how many processes are requesting instructions and how the cycle handles them.

5 more questions in this section. Enroll free to practise them all.