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4 cards from this section. Quick, good the night before a test.
Define a data hazard and give an example.
Think about dependency between instructions.
What is a structural hazard?
Consider hardware limitations.
What type of data hazard occurs when an instruction tries to write before an earlier instruction has read it?
Focus on the order of operations in instructions.
True or False: Control hazards can lead to pipeline stalls.
Think about what happens during branching.
Given two instructions: I1 writes data to register R1 and I2 reads from R1 immediately. Explain how this execution may be impacted by a data hazard.
Consider the timing of the operations in pipeline execution.
Analyze a scenario where multiple instructions in a pipeline attempt to utilize the same ALU. What type of hazard could occur and how might you resolve it?
Reflect on how resource allocation plays a role in pipelining.
6 more questions in this section. Enroll free to practise them all.
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