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4 cards from this section. Quick, good the night before a test.
What is a branch instruction?
Think about if statements and loops.
Define a control hazard.
It relates to instruction fetching delays.
What is the main purpose of branch instructions?
Think of loops and conditional statements.
True or False: Control hazards can occur when the pipeline waits for branch outcomes.
Reflect on the delays linked to branches.
Analyze how branch prediction affects the throughput of a two-way superscalar processor with deep pipelining under varying workloads.
Consider how predictions impact instruction rates.
Evaluate the trade-offs between using delay slots and modern dynamic prediction mechanisms in pipelined architectures.
Think about the advantages each method has in practice.
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