Practice Branch Decision Delay (4.2.2) - Branches and Limits to Pipelining

Practice: Branch Decision Delay

Lesson 4.2.2Branches and Limits to Pipelining

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9 questions

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3 questions · about 2 min · pass mark 70%. Hints available.
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6 sample questions

Question 1.
What is branch decision delay?
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Think about what happens after a branch instruction.
Question 2.
Name a type of hazard caused by branch instructions.
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This hazard is about waiting for the outcome of a decision.
3Question 3.
What is the primary cause of branch decision delay?
- Incorrect pipeline design
- Waiting for the branch outcome
- Extended clock cycles
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Consider what happens when a branch instruction is hit.
4Question 4.
True or False: Control hazards occur only in deeply pipelined processors.
- True
- False
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Think about the definition of control hazards.
Question 5.
Analyze a pipeline that executes an architecture with 5 stages, encountering a branch every third instruction. If the branch takes 4 cycles to resolve, how does this affect the overall rate of instruction completion?
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Calculate how many instructions effectively get processed in relation to branches.
Question 6.
Create a scenario in which branch decision delays have a minimal impact. What strategy could you implement in a superficial pipeline to achieve minimal delays?
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Consider how guessing the outcome might help.

5 more questions in this section. Enroll free to practise them all.