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3 cards from this section. Quick, good the night before a test.
What does formal verification aim to prove?
Consider what verification means.
What is model checking?
Focus on the automation aspect.
What is the main purpose of formal verification?
Think about what verification ensures.
True or False: Model checking can verify all possible states of a design.
Consider the exhaustive checking nature.
Given a hypothetical VLSI design, outline a strategy using compositional model checking to verify it while addressing potential state explosion.
Think about modular design.
Develop and specify an LTL property for a reset condition in a simplified digital circuit.
Recall what properties mean in LTL.
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