SOC Design 1: Design & Verification
Engineering · 10 chapters · 167 sections · about 81 hours
Chapters
10 chapters · 167 sections- 1Introduction to SoC Chip Design Flow11 sections
- 2Introduction to EDA Tools12 sections
- 3Verilog-Based RTL Design22 sections
- 4Integration of Digital and Analog IPs in SoC Design15 sections
- 5Techniques for Integrating Diverse IPs into a Single SoC19 sections
- 6RTL Verification using Simulation Methods15 sections
- 7RTL Verification using Formal Methods21 sections
- 8Application of Formal Methods in RTL Verification18 sections
- 9Scripting Languages for Chip Design Automation16 sections
- 10Rapid Prototyping with FPGAs and Emulation Hardware Validation18 sections
About this course
This course explores Electronics System Design, focusing on VHDL, Verilog, and FPGA technologies. Students will gain knowledge of hardware description languages, digital system design principles, and FPGA implementation. The course includes hands-on lab work, simulations, and projects to provide practical experience in system design.